Skip to content
Commit 344df980 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Jani Nikula
Browse files

drm/i915/skl: Disable coarse power gating up until F0



There is conflicting info between E0 and F0 steppings
for this workarounds. Trust more authoritative source and
be conservative and extend also for F0.

This prevents numerous (>50) gpu hangs with SKL GT4e
during piglit run.

References: HSD: gen9lp/2134184
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1449505785-20812-1-git-send-email-mika.kuoppala@intel.com


(cherry picked from commit 6686ece1)
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 4a1e1d05
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment