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Commit 100f586b authored by Shaohui Xie's avatar Shaohui Xie Committed by Jeff Garzik
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sata_fsl: add workaround for data length mismatch on freescale V2 controller



The freescale V2 SATA controller checks if the received data length matches
the programmed length 'ttl', if not, it assumes that this is an error.
In ATAPI, the 'ttl' is based on max allocation length and not the actual
data transfer length, controller will raise 'DLM' (Data length Mismatch)
error bit in Hstatus register. Along with 'DLM', DE (Device error) and
FE (fatal Error) bits are also set in Hstatus register, 'E' (Internal Error)
bit is set in Serror register and CE (Command Error) and DE (Device error)
registers have the corresponding bit set. In this condition, we need to
clear errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.

Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: default avatarAnju Bhartiya <Anju.Bhartiya@freescale.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent 65fe1f0f
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