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Commit f6b530ac authored by Clarence Ip's avatar Clarence Ip
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drm/msm/sde: handle sticky inline rotate flush bit



The ROT bit of the flush register is only cleared during
frames with inline rotation enabled, so avoid checking its
status unless the CTL is configured for inline rotation.

When re-entering an inline rotation, it is also necessary to
postpone the ctl sbuf mode configuration until after the
rotator hardware has completed setting up the current commit
because a vsync can potentially start the rotator before the
encode kickoff/flush when operating in video mode.

Change-Id: I13641a1e90ed8de5cc1fb51c019c9bad9363041d
Signed-off-by: default avatarClarence Ip <cip@codeaurora.org>
parent d9089f47
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