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Commit c5a7d924 authored by Clarence Ip's avatar Clarence Ip
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drm/msm/sde: increase hw reset wait to 2ms



The existing polling loop that waits for ctl hardware
resets can time out in as little as 400us. This patch
increases the polling loop to 2ms, and makes use of
ktime to provide a more deterministic wait interval.

Change-Id: I34f640e193ba0a2e40eaf6b826ea61a47493a0dc
Signed-off-by: default avatarClarence Ip <cip@codeaurora.org>
parent 814e5c69
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