ARM: dts: msm: update APC0 speed bin 1 CPRh regulator config for SDM845 v2

Increase the highest frequency supported by the VDD_APC0 L3 CPRh
regulator on SDM845v2 parts with SPEED_BIN=1 from 1478.4 MHz to
1593.6 MHz.  This ensures that performance improvements based
upon characterization results can be realized.

Also increase the VDD_APC0 CPR Turbo ceiling voltage to 1000 mV
for both the L3 and power cluster CPRh regulators.  This ensures
proper operation on all chips.

Change-Id: I9a7e0d2f67e5006b967bcd9b2a75776821991865
Signed-off-by: David Collins <collinsd@codeaurora.org>