ARM: dts: msm: Add missing clock-ctrl setting for write-back on sdm845
SDE DRM driver reads this value for WB2 clock gating control. If not
present in device node, the current driver writes to a read-only
register (offset 0.0 from SSPP_TOP0). This patch fixes the bug.
CRs-Fixed: 2072416
Change-Id: I9d181fe9cf1b8b9955ef160924f1ca1f1b7e9efe
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
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