clk: qcom: Reconfigure the APSS RCG during boot

For apcs_clk, Boot configures it to run at turbo level and during HLOS
bootup cpu clock driver recalculates the rate by reading HW registers and
initialize the software rate. After that it calls clk_set_rate() for the
same clock to run at turbo level, since rate has been already calculated
and in turn clock framework does not allow to initialize RCG src and div
values and eventually it ends up in configuring APSS RCG to XO during
clk_enable(). Fix the same by reconfiguring the APSS RCG to aux0 clock
rate and then switch back to turbo level so that source and div values
can be properly initialized.

Change-Id: I54cc79d6b3769a391a1f261bb5b7e32a109a542e
Signed-off-by: Amit Nischal <anischal@codeaurora.org>