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Commit 404c1ff6 authored by Stephen Boyd's avatar Stephen Boyd
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clk: qcom: Support bypass RCG configuration



In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.

Tested-by: default avatarRob Clark <robdclark@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 24d8fba4
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