Skip to content
Commit 6c4a057b authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Paul Walmsley
Browse files

ARM: OMAP4: clock data: Force a DPLL clkdm/pwrdm ON before a relock



All DPLLs except USB are in ALWON powerdomain. Make sure the
clkdm/pwrdm for USB DPLL (l3init) is turned on before attempting
a DPLL relock. So, mark the database accordingly.

Without this fix, it was seen that DPLL relock fails while testing
relock in a loop of USB DPLL.

Cc: Nishanth Menon <nm@ti.com>
Tested-by: default avatarAmeya Palande <ameya.palande@ti.com>
Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 91a290c4
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment