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Commit db8ae1be authored by Sandeep Panda's avatar Sandeep Panda Committed by Aravind Venkateswaran
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drm/msm/dsi-staging: fix DSI controller init sequence



Ensure that all the DSI clocks are on and sourced correctly from the
DSI PLL prior to issuing the DSI controller software reset as part of
the initialization sequence. If the clocks are not correctly configured
then the soft reset may not take effect and can lead to DSI commands
transfer failures.

CRs-Fixed: 2085016
Change-Id: I582fcbc0dc1d57955e900c9ffa7e797454b4ba9c
Signed-off-by: default avatarAravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
parent d98d9ee8
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