- Feb 28, 2021
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cyrozap authored
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- Feb 23, 2021
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cyrozap authored
Always having to import md32_dis.py into a Python interpreter just to disassemble one instruction got kind of annoying, so I added some basic command-line functionality to the module.
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- Feb 07, 2021
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cyrozap authored
The BROM log length gets set to zero when the log is either dumped out the UART or read by one of the DL mode "read BROM log" commands (0xDD/0xDF), so we only limit the the output length when the reported length is non-zero. When the reported length is zero, we simply print each character until we either hit the default max length (0x400 bytes, the length of the BROM log buffer) or encounter a non-printable character.
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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cyrozap authored
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- Jan 26, 2021
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cyrozap authored
The obfuscated version isn't terribly useful, and it can always be regenerated by performing the XOR again, so let's just save the deobfuscated version by default.
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cyrozap authored
This lets us set it to negative values without having to do the two's complement manually.
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cyrozap authored
IMEM only has enough space for 512 instruction words, so make sure we don't accidentally try to write more than that.
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cyrozap authored
Loading a 16-bit immediate only works when the destination register is r0-r7. To enable this function to set any one of the 32 general-purpose registers, convert this into a load-shift-add of 11-bit and 5-bit immediates.
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cyrozap authored
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cyrozap authored
Unfortunately, while "sethi" can be approximated with a 16-bit imediate load and a shift by immediate, there's no way to then OR the destination register with a 16-bit immediate. This means if we want to set a register without using any temporary registers, we need to load the 16-bit immediate, shift the destination left by 4, add the next nybble to the destination, and then repeat that shift-by-4-and-add-nybble sequence another three times to finish the 32-bit load.
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cyrozap authored
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cyrozap authored
It's currently hardcoded to work with the MT8163, but it shouldn't take much effort to get it working with other SoCs.
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- Jan 25, 2021
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cyrozap authored
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- Jan 24, 2021
- Jan 22, 2021
- Jan 19, 2021
- Jan 18, 2021
- Jan 12, 2021
- Dec 22, 2020
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cyrozap authored
This seems to give better results than just the mnemonic and arg format alone.
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- Dec 14, 2020
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cyrozap authored
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cyrozap authored
After some testing, I found that the PCM reset vector is zero, so the NOP sled isn't needed. I'm not really sure why my code wasn't working without it before, but it does now, so let's remove it. Also, change the instructions to register writes so it's easier to tell that it's working.
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