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Commit a3c4946d authored by Ralf Baechle's avatar Ralf Baechle
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[MIPS] SB1: Fix interrupt disable hazard. 


    
The SB1 core has a three cycle interrupt disable hazard but we were
wrongly treating it as fully interlocked.
    
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 3a2f7357
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