drm/i915: fix 945 fence register writes for fence 8 and above.

The last 8 fence registers sit at a different offset, so when we went to set
fence number 8 in the lower offset, we instead set PGETBL_CTL, and the GPU
got all sorts of angry at us.

fd.o bug #20567.  Easily reproducible by running glxgears and killing it about
6 times.

Signed-off-by: Eric Anholt <eric@anholt.net>