i2c-algo-bit: Complain about masters which can't read SCL
The I2C specification explicitly describes both SDA and SCL as
bidirectional lines. An I2C master with a read-only SCL is thus not
compliant. If a slow slave stretches the clock, errors will happen,
so the bus can't be considered as reliable.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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