Skip to content
Commit 684f7414 authored by Zhiwu Song's avatar Zhiwu Song Committed by Barry Song
Browse files

ARM: CSR: add rtc i/o bridge interface for SiRFprimaII



The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.

Signed-off-by: default avatarZhiwu Song <zhiwu.song@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Reviewed-by: default avatarJamie Iles <jamie@jamieiles.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 858ba703
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment