drm/msm/sde: fix smartDMA programming
This change fixes the following issues when an SDE plane
is programmed in smartDMA mode:
- On programming a HW pipe in multirect mode,
QSEED block will by bypassed. Still alpha and
bitwidth of the QSEED need to be updated for
RECT0 path.
- With PD_MEM split into half in parallel fetch
mode, each RECT can support up to full SSPP width
if programmed with linear format buffers as they
require only 2 lines of buffering. But with tiled
format buffers, each RECT can support half the
width as they require 5 lines of buffering.
- If both the RECT's share the same register for
programming a field, clear the respective register
bits when not in use.
Change-Id: I9ea77e0f9bc5dbc94ffe5e5a6bea0ebe35df5a74
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
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