Commit 19dfbdae authored by mohancm100's avatar mohancm100
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In-line kernel building fix

parent a3874b6b
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/*
 * This header provides constants for DRA7 ATL (Audio Tracking Logic)
 *
 * The constants defined in this header are used in dts files
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 *
 * Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H
#define _DT_BINDINGS_CLK_DRA7_ATL_H

#define DRA7_ATL_WS_MCASP1_FSR		0
#define DRA7_ATL_WS_MCASP1_FSX		1
#define DRA7_ATL_WS_MCASP2_FSR		2
#define DRA7_ATL_WS_MCASP2_FSX		3
#define DRA7_ATL_WS_MCASP3_FSX		4
#define DRA7_ATL_WS_MCASP4_FSX		5
#define DRA7_ATL_WS_MCASP5_FSX		6
#define DRA7_ATL_WS_MCASP6_FSX		7
#define DRA7_ATL_WS_MCASP7_FSX		8
#define DRA7_ATL_WS_MCASP8_FSX		9
#define DRA7_ATL_WS_MCASP8_AHCLKX	10
#define DRA7_ATL_WS_XREF_CLK3		11
#define DRA7_ATL_WS_XREF_CLK0		12
#define DRA7_ATL_WS_XREF_CLK1		13
#define DRA7_ATL_WS_XREF_CLK2		14
#define DRA7_ATL_WS_OSC1_X1		15

#endif
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/*
 * This header provides constants for AT91 pmc status.
 *
 * The constants defined in this header are being used in dts.
 *
 * Licensed under GPLv2 or later.
 */

#ifndef _DT_BINDINGS_CLK_AT91_H
#define _DT_BINDINGS_CLK_AT91_H

#define AT91_PMC_MOSCS		0		/* MOSCS Flag */
#define AT91_PMC_LOCKA		1		/* PLLA Lock */
#define AT91_PMC_LOCKB		2		/* PLLB Lock */
#define AT91_PMC_MCKRDY		3		/* Master Clock */
#define AT91_PMC_LOCKU		6		/* UPLL Lock */
#define AT91_PMC_PCKRDY(id)	(8 + (id))	/* Programmable Clock */
#define AT91_PMC_MOSCSELS	16		/* Main Oscillator Selection */
#define AT91_PMC_MOSCRCS	17		/* Main On-Chip RC */
#define AT91_PMC_CFDEV		18		/* Clock Failure Detector Event */

#endif
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/*
 * Copyright (C) 2013 Broadcom Corporation
 * Copyright 2013 Linaro Limited
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _CLOCK_BCM21664_H
#define _CLOCK_BCM21664_H

/*
 * This file defines the values used to specify clocks provided by
 * the clock control units (CCUs) on Broadcom BCM21664 family SoCs.
 */

/* bcm21664 CCU device tree "compatible" strings */
#define BCM21664_DT_ROOT_CCU_COMPAT	"brcm,bcm21664-root-ccu"
#define BCM21664_DT_AON_CCU_COMPAT	"brcm,bcm21664-aon-ccu"
#define BCM21664_DT_MASTER_CCU_COMPAT	"brcm,bcm21664-master-ccu"
#define BCM21664_DT_SLAVE_CCU_COMPAT	"brcm,bcm21664-slave-ccu"

/* root CCU clock ids */

#define BCM21664_ROOT_CCU_FRAC_1M		0
#define BCM21664_ROOT_CCU_CLOCK_COUNT		1

/* aon CCU clock ids */

#define BCM21664_AON_CCU_HUB_TIMER		0
#define BCM21664_AON_CCU_CLOCK_COUNT		1

/* master CCU clock ids */

#define BCM21664_MASTER_CCU_SDIO1		0
#define BCM21664_MASTER_CCU_SDIO2		1
#define BCM21664_MASTER_CCU_SDIO3		2
#define BCM21664_MASTER_CCU_SDIO4		3
#define BCM21664_MASTER_CCU_SDIO1_SLEEP		4
#define BCM21664_MASTER_CCU_SDIO2_SLEEP		5
#define BCM21664_MASTER_CCU_SDIO3_SLEEP		6
#define BCM21664_MASTER_CCU_SDIO4_SLEEP		7
#define BCM21664_MASTER_CCU_CLOCK_COUNT		8

/* slave CCU clock ids */

#define BCM21664_SLAVE_CCU_UARTB		0
#define BCM21664_SLAVE_CCU_UARTB2		1
#define BCM21664_SLAVE_CCU_UARTB3		2
#define BCM21664_SLAVE_CCU_BSC1			3
#define BCM21664_SLAVE_CCU_BSC2			4
#define BCM21664_SLAVE_CCU_BSC3			5
#define BCM21664_SLAVE_CCU_BSC4			6
#define BCM21664_SLAVE_CCU_CLOCK_COUNT		7

#endif /* _CLOCK_BCM21664_H */
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/*
 * Copyright (C) 2013 Broadcom Corporation
 * Copyright 2013 Linaro Limited
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _CLOCK_BCM281XX_H
#define _CLOCK_BCM281XX_H

/*
 * This file defines the values used to specify clocks provided by
 * the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
 */

/*
 * These are the bcm281xx CCU device tree "compatible" strings.
 * We're stuck with using "bcm11351" in the string because wild
 * cards aren't allowed, and that name was the first one defined
 * in this family of devices.
 */
#define BCM281XX_DT_ROOT_CCU_COMPAT	"brcm,bcm11351-root-ccu"
#define BCM281XX_DT_AON_CCU_COMPAT	"brcm,bcm11351-aon-ccu"
#define BCM281XX_DT_HUB_CCU_COMPAT	"brcm,bcm11351-hub-ccu"
#define BCM281XX_DT_MASTER_CCU_COMPAT	"brcm,bcm11351-master-ccu"
#define BCM281XX_DT_SLAVE_CCU_COMPAT	"brcm,bcm11351-slave-ccu"

/* root CCU clock ids */

#define BCM281XX_ROOT_CCU_FRAC_1M		0
#define BCM281XX_ROOT_CCU_CLOCK_COUNT		1

/* aon CCU clock ids */

#define BCM281XX_AON_CCU_HUB_TIMER		0
#define BCM281XX_AON_CCU_PMU_BSC		1
#define BCM281XX_AON_CCU_PMU_BSC_VAR		2
#define BCM281XX_AON_CCU_CLOCK_COUNT		3

/* hub CCU clock ids */

#define BCM281XX_HUB_CCU_TMON_1M		0
#define BCM281XX_HUB_CCU_CLOCK_COUNT		1

/* master CCU clock ids */

#define BCM281XX_MASTER_CCU_SDIO1		0
#define BCM281XX_MASTER_CCU_SDIO2		1
#define BCM281XX_MASTER_CCU_SDIO3		2
#define BCM281XX_MASTER_CCU_SDIO4		3
#define BCM281XX_MASTER_CCU_USB_IC		4
#define BCM281XX_MASTER_CCU_HSIC2_48M		5
#define BCM281XX_MASTER_CCU_HSIC2_12M		6
#define BCM281XX_MASTER_CCU_CLOCK_COUNT		7

/* slave CCU clock ids */

#define BCM281XX_SLAVE_CCU_UARTB		0
#define BCM281XX_SLAVE_CCU_UARTB2		1
#define BCM281XX_SLAVE_CCU_UARTB3		2
#define BCM281XX_SLAVE_CCU_UARTB4		3
#define BCM281XX_SLAVE_CCU_SSP0			4
#define BCM281XX_SLAVE_CCU_SSP2			5
#define BCM281XX_SLAVE_CCU_BSC1			6
#define BCM281XX_SLAVE_CCU_BSC2			7
#define BCM281XX_SLAVE_CCU_BSC3			8
#define BCM281XX_SLAVE_CCU_PWM			9
#define BCM281XX_SLAVE_CCU_CLOCK_COUNT		10

#endif /* _CLOCK_BCM281XX_H */
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/*
 * Berlin2 BG2/BG2CD clock tree IDs
 */

#define CLKID_SYS		0
#define CLKID_CPU		1
#define CLKID_DRMFIGO		2
#define CLKID_CFG		3
#define CLKID_GFX		4
#define CLKID_ZSP		5
#define CLKID_PERIF		6
#define CLKID_PCUBE		7
#define CLKID_VSCOPE		8
#define CLKID_NFC_ECC		9
#define CLKID_VPP		10
#define CLKID_APP		11
#define CLKID_AUDIO0		12
#define CLKID_AUDIO2		13
#define CLKID_AUDIO3		14
#define CLKID_AUDIO1		15
#define CLKID_GFX3D_CORE	16
#define CLKID_GFX3D_SYS		17
#define CLKID_ARC		18
#define CLKID_VIP		19
#define CLKID_SDIO0XIN		20
#define CLKID_SDIO1XIN		21
#define CLKID_GFX3D_EXTRA	22
#define CLKID_GC360		23
#define CLKID_SDIO_DLLMST	24
#define CLKID_GETH0		25
#define CLKID_GETH1		26
#define CLKID_SATA		27
#define CLKID_AHBAPB		28
#define CLKID_USB0		29
#define CLKID_USB1		30
#define CLKID_PBRIDGE		31
#define CLKID_SDIO0		32
#define CLKID_SDIO1		33
#define CLKID_NFC		34
#define CLKID_SMEMC		35
#define CLKID_AUDIOHD		36
#define CLKID_VIDEO0		37
#define CLKID_VIDEO1		38
#define CLKID_VIDEO2		39
#define CLKID_TWD		40
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