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Commit aab9b520 authored by Dhaval Patel's avatar Dhaval Patel
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drm/msm/sde: update vsync source to dummy before mode-2 entry



DRM driver turns off the vsync from software side and requests
for mode-2 entry for gdsc power collapse. The display panel is
ON and still generating TE (vsync) signal because this sequence
is triggered during idle power collapse state. In this state, RSC
driver has to turn ON the solver mode to enter in mode-2 and
SDE rsc hardware does not expect any vsync signal. Hardware goes
to bad state if panel TE signal and SW mode-2 entry request received
at the same time. This cause invalid mode-2 entry after idle power
restore + frame kickoff (rising edge for idle). This race condition
between mode-2 entry and vsync can be avoided by selecting watchdog
timer as vsync source without actually enabling watchdog timer. That
provides guarantee of no vsync signal when software request
for mode-2 entry.

Change-Id: I1377cb1ba532f65e4c00becb9636148e403b2672
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 814e5c69
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