This function tests what regions of memory are accessible over USB DL
mode. Useful for exploring a new SoC and testing how locked-down it is.

I first wrote this code months ago but I forgot to commit it.

This SoC is software-compatible with the MT6735, so the GPIO mode
register should be exactly the same. I'm still not sure why I haven't
been able to get JTAG working, but this change has been sitting around
uncommitted for a while now and I figure there's at least no harm in
doing that now.

I made this change a while ago--not sure why I never commit it until
now.

We've been able to run code on the Cortex-R4 at least since commit
07a02605. Though, I can't remember if
the stack actually works yet or not, or if I still need to change where
the stack pointer gets initialized to.

This should enable more robust error handling.

This should enable more robust error handling.

This should work on most devices, so turn it into a function.

The BROM log gets written to memory in addition to being sent out the
UART, so even if you don't have a UART connected you can still see the
log. Also, this log seems to be a bit more "verbose" than what gets
printed over the UART.

"UART1" here meaning the 1st UART, which I would call "UART0". Also,
this is usually enabled by default, so it usually isn't necessary to run
this command.

Looks like this was changed back in June and again in August.

Also remove "-fpie" because this won't work with it enabled, most likely
because "-fpie" creates some .got* sections that probably should be
loaded into "RAM" (0x00231000) at some point, but that never happens
since those sections aren't in the linker script. As it is now, even
with the option enabled, the code was never truly position-independent
due to the fixed "RAM" address, so once I fix that issue (by letting RAM
start immediately after ROM), have a separate .rodata section without
the executable bit set (for cleaner disassembly), and properly load the
.got* sections, I can re-enable that option.

Eventually this will be used to init PMIC/DRAM.