The reg_read() function already accounts for their special cases, so
there's no need to do so again.

Reuse the print and println functions from hello-aarch64 and remove
strnlen since we really don't need it.

The mode-switch binary failed to run in the emulator because it wasn't
initializing the stack pointer. It probably worked when running on real
hardware only because the stack pointer was already initialized there,
and this code simply reused it.

While we're initializing the stack pointer, we might as well initialize
everything else, too, so this change also initializes the
general-purpose registers, the link register, and the .data and .bss
sections of the binary (even though this code doesn't use them).

Add support for MT6750

It doesn't actually disassemble instructions yet--for now it only prints
them in hex and binary. This makes it easier to see patterns in the
instruction bits.

For some reason, Kiwi IRC can't connect to OFTC over TLS, so let's link
to the official OFTC web chat interface instead.

The Matrix bridge for the postmarketOS lowlevel channel has switched to
OFTC, so reflect this change in the Readme.

Always having to import md32_dis.py into a Python interpreter just to
disassemble one instruction got kind of annoying, so I added some basic
command-line functionality to the module.

The BROM log length gets set to zero when the log is either dumped out
the UART or read by one of the DL mode "read BROM log" commands
(0xDD/0xDF), so we only limit the the output length when the reported
length is non-zero. When the reported length is zero, we simply print
each character until we either hit the default max length (0x400 bytes,
the length of the BROM log buffer) or encounter a non-printable
character.

The obfuscated version isn't terribly useful, and it can always be
regenerated by performing the XOR again, so let's just save the
deobfuscated version by default.

This lets us set it to negative values without having to do the two's
complement manually.

IMEM only has enough space for 512 instruction words, so make sure we
don't accidentally try to write more than that.

Loading a 16-bit immediate only works when the destination register is
r0-r7. To enable this function to set any one of the 32 general-purpose
registers, convert this into a load-shift-add of 11-bit and 5-bit
immediates.

Unfortunately, while "sethi" can be approximated with a 16-bit imediate
load and a shift by immediate, there's no way to then OR the destination
register with a 16-bit immediate. This means if we want to set a
register without using any temporary registers, we need to load the
16-bit immediate, shift the destination left by 4, add the next nybble
to the destination, and then repeat that shift-by-4-and-add-nybble
sequence another three times to finish the 32-bit load.

It's currently hardcoded to work with the MT8163, but it shouldn't take
much effort to get it working with other SoCs.