msm: mdss: avoid FIFO overflow handling when error is masked

In case of DSI video mode panels, interrupt generation for DSI
FIFO overflow error is masked during DCS read commands since it
is expected. However, when the panel is under ESD attack, it is
possible that harmless DSI ACK/PHY lane errors are generated.
When a DSI error interrupt is generated, all the possible DSI
errors are checked in mdss_dsi_error API. This causes DSI FIFO
overflow recovery even though it is not expected, causing a
possible flicker on the panel. Avoid DSI FIFO overflow recovery
in such cases where the mask bit is set.

Change-Id: I2bd2810d5ee63ccf0242f8023ae6aee0f3957b93
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>